Application Notes & Papers

Solution files generated to illustrate the notes are either in Simbeor Solutions directory after installation of Simbeor or available for download - see information at the last page of the notes.
Explore Interconnect Analysis & Modeling with Gemini AI and Simberian App Notes...
See also Technical Presentations section and Publications section in Knowledge Base...

• #2025_02: Y. Shlepnev, A. Manukovsky, Waveguiding Approach to Via Design with Bandwidth over 120 GHz, 2025 IEEE 34nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS2025), October 20, 2025.
• #2025_01: A. Manukovsky, Y. Shlepnev, J. Nutzati, A. Kuntsevych, I. Peleg, S. Mordooch Via Design for 112 Gbps and Beyond: Theory and Reality, DesignCon 2025. Santa Clara, CA - Presentation with animation is available here.
• #2024_02: Y. Shlepnev, Progress in Decompositional Electromagnetic Analysis of Digital Interconnects, December 7, 2024. - short version published in arXive.
• #2024_01: Y. Shlepnev, How Interconnects Work: Crosstalk Quantification, February 14, 2024.
• #2023_04: Y. Shlepnev How Interconnects Work: Anatomy of Crosstalk, December 27, 2023.
• #2023_03: A. Manukovsky, Y. Shlepnev, S. Mordooch, Quantification of Delay and Skew Uncertainty due to Fiber Weave Effect in PCB Interconnects, 2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS2023), October 16, 2023.
• #2023_02: Y. Shlepnev, Flawless Interconnect Design with Simbeor Software, July 10, 2023.
• #2023_01: A. Manukovsky, Y. Shlepnev, S. Mordooch, Impact Evaluation of Fiber-Weave Effect Induced Delay Uncertainty in DDR Data Links on DDR5 & Towards DDR6, February 2nd, DesignCon 2023 - Presentation is available here.
• #2022_01: Y. Shlepnev, How Interconnects Work: Reflections from Discontinuities , January 10, 2022.
• #2021_11: Y. Shlepnev, How Interconnects Work: Impedance and Reflections, December 22, 2021.
• #2021_10: Y. Shlepnev, How Interconnects Work: Absorption, Dissipation and Dispersion, November 26, 2021.
• #2021_09: Y. Shlepnev, How Interconnects Work: Bandwidth for Modeling and Measurements, November 8, 2021.
• #2021_08: Y. Shlepnev, Evaluation of S-Parameters Similarity with Modified Hausdorff Distance, 2021 IEEE 30st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS2021), October 19, 2021. - Presentation is available here.
• #2021_07: A. Manukovsky, Y. Shlepnev, Z. Khasidashvili, Machine Learning Based Design Space Exploration and Applications to Signal Integrity Analysis of 112Gb SerDes Systems, 2021 IEEE 71st Electronic Components and Technology Conference (ECTC 2021), June 2021, p. 1234-1245. - Presentation is available here.
• #2021_06: Y. Shlepnev, S-Parameters: New Look and Similarity, May 24, 2021.
• #2021_05: Y. Shlepnev, S-Parameters Similarity Metric, May 24, 2021.
• #2021_04: Y. Shlepnev, Dielectric and Conductor Roughness Model Identification – Does Bandwidth Matter?, May 5, 2021.
• #2021_03: How to Identify Material Models for PCB & PKG Interconnects With Simbeor SDK, April 25, 2021.
• #2021_02: Y. Shlepnev, Validation of Bend Models with Measurements, April 2, 2021.
• #2021_01: Y. Shlepnev, How Interconnects Work: Minimal-reflection 90-degree bends in strip lines, March 2, 2021.
• #2020_02: Y. Shlepnev, How Interconnects Work: Traces Between Parallel Planes..., March 24, 2020.
• #2020_01: A. Manukovsky, Y. Shlepnev, Z. Khasidashvili, E. Zalianski, Machine Learning Applications for COM Based Simulation of 112Gb Systems, Wednesday, January 28-30, DesignCon 2020 - Presentation is available here.
• #2019_04: A. Manukovsky, Y. Shlepnev, Measurement-assisted extraction of PCB interconnect model parameters with fabrication variations, 2019 IEEE 28st Conference on Electrical Performance of Electronic Packaging and Systems, Oct. 6-9, 2019, (EPEPS 2019), October 6-9, 2019, Montreal, Canada. Presentation is also available here.
• #2019_03: Y. Shlepnev, Conductor surface roughness modeling: From "snowballs" to "cannonballs", March 18, 2019.
• #2019_02: Y. Damgaci, Y. Choi, C. Cheng, Y. Shlepnev, Simplify & Validate: A Single Structure Approach for Separate PCB Dielectric & Conductor Roughness Loss Characterization, January 31st, DesignCon 2019. - presentation is available here.
• #2019_01: A. Manukovsky, Y. Shlepnev, Effect of PCB Fabrication Variations on Interconnect Loss, Delay, Impedance & Identified Material Models for 56-Gbps Interconnect Designs, - nominated for Best Paper Award at DesignCon 2019, January 30th, 2019 - presentation is available here.
• #2018_07: M. Marin, Y. Shlepnev, Systematic approach to PCB interconnects analysis to measurement validation, 2018 IEEE Symposium on Electromagnetic Compatibility, Signal and Power Integrity, July 30- August 3, 2018, Long Beach Convention Center, Long Beach, CA - Best Symposium Paper Finalist. Presentation is available here.
• #2018_06: Y. Shlepnev, Design insights from electromagnetic analysis: Effects of meshed reference planes on interconnects, July 20, 2018.
• #2018_05: Y. Shlepnev, Advanced stackup planning with impedance, delay and loss validation, June 28, 2018.
• #2018_04: Analysis of traces over meshed planes for flexible interconnects, June 22, 2018.
• #2018_03: Y. Shlepnev, Life beyond 10 Gbps: Localize or Fail!, April 13, 2018.
• #2018_02: Y. Shlepnev, Moving from 28 Gbps NRZ to 56 Gbps PAM-4 - is it "free lunch"?, March 8, 2018.
• #2018_01: M. Marin, Y. Shlepnev, 40 GHz PCB Interconnect Validation: Expectation vs. Reality, DesignCon2018, January 31, 2018, Santa Clara, CA. - the award-winning paper from DesignCon2018. Presentation with complete report is also available here.
• #2017_04: Y. Shlepnev, Unified approach to interconnect conductor surface roughness modelling, 2017 IEEE 26st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS2017), October 15-18, 2017, San Jose, CA. Presentation with animation is also available here.
• #2017_03: Identification of dielectric and conductor roughness models with differential lines (step by step example).
• #2017_02: E. Bogatin, Y. Shlepnev, T. Wang Lee, Back to basics: the onset of skin effect in circuit board traces, DesignCon 2017, Santa Clara, CA. Presentation is also available here.
• #2017_01: Y. Choi, C. Cheng, Y. Damgaci, N. Godishala, Y. Shlepnev, Cost-effective PCB Material Characterization for High-volume Production Monitoring, DesignCon 2017, Santa Clara, CA. - the award-winning paper from DesignCon2017. Presentation is also available here.
• #2016_02: Y. Shlepnev, Y. Choi, C. Cheng, Y. Damgaci, Drawbacks and Possible Improvements of Short Pulse Propagation Technique, 2016 IEEE 25st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS'2016), pp. 141-143, October 23-26, 2016, San Diego, CA. Presentation is also available here.
• #2016_01: Y. Shlepnev, How Interconnects Work: Modeling Conductor Loss and Dispersion, 2016.
• #2015_02: Y. Shlepnev, Broadband material model identification with GMS-parameters,Extended version of paper from 2015 IEEE 24st Conference on Electrical Performance of Electronic Packaging and Systems, October 25-28, 2015, San Jose, CA. Presentation is also available here.
• #2015_01: Currents in microstrip line.
• #2014_05: Y. Shlepnev, Sink or swim at 28 Gbps, The PCB Design Magazine, October 2014, p. 12-23. The original version is also available here.
• #2014_04: Y. Shlepnev, C. Nwachukwu, Modelling jitter induced by fibre weave effect in PCB dielectrics, 2014 IEEE International Symposium on Electromagnetic Compatibility, Raleigh, NC, USA, August, 2014 Presentation is available here.
• #2014_03: Y. Shlepnev, PCB and package design up to 50 GHz: Identifying dielectric and conductor roughness models, The PCB Design Magazine, February 2014, p. 12-28. The original version is also available here.
• #2014_02: Y. Shlepnev, Dielectric and conductor roughness model identification for successful PCB and packaging interconnect design up to 50 GHz, presentation with live demo of Simbeor software at DesignCon 2014.
• #2014_01: W. Beyene, Y.-C. Hahm, J. Ren, D. Secker, D. Mullen, Y. Shlepnev, Lessons learned: How to Make Predictable PCB Interconnects for Data Rates of 50 Gbps and Beyond, DesignCon2014 Slides from the presentation are also available here.
• #2013_06: Y. Shlepnev, Design Insights from Electromagnetic Analysis of Interconnects, presented at Front Range Signal Integrity seminar, Oct. 3, 2013, Longmont, CO.
• #2013_05: Y. Shlepnev, Decompositional Electromagnetic Analysis of Digital Interconnects, IEEE International Symposium on Electromagnetic Compatibility (EMC2013), Denver, CO, 2013, p.563-568. Slides from the presentation are also available here.
• #2013_04: Analysis of differential line transition from tight to loose coupling.
• #2013_03: Y. Shlepnev, Building interconnect models with analysis to measurement correlation up to 50 GHz and beyond, notes for DesignCon2013 tutorial.
• #2013_02: Y. Shlepnev, Elements of Decompositional Electromagnetic Analysis of Interconnects, DesignCon2013 tutorial slides.
• #2013_01: Eric Bogatin, Don DeGroot, Paul G. Huray, Yuriy Shlepnev, Which one is better? Comparing Options to Describe Frequency Dependent Losses, DesignCon2013. Slides from the presentation are also available here.
• #2012_02: Can conductor roughness effect be accounted for in dielectric model?
• #2012_01: Y. Shlepnev, C. Nwachukwu, Practical methodology for analyzing the effect of conductor roughness on signal losses and dispersion in interconnects, DesignCon2012. Slides from the presentation are also available here.
• #2011_04: Material parameters identification with GMS-parameters in Simbeor 2011. Version in Japanese is available here.
• #2011_03: D. Dunham, J. Lee, S. McMorrow, Y. Shlepnev, 2.4mm Design/Optimization with 50 GHz Material Characterization, DesignCon2011. Slides from the presentation are also available here.
• #2011_02: J. Bell, S. McMorrow, M. Miller, A. P. Neves, Y. Shlepnev, Unified Methodology of 3D-EM/Channel Simulation/Robust Jitter Decomposition, DesignCon2011.
• #2011_01: Y. Shlepnev, Reflections on S-parameter Quality, DesignCon2011 IBIS Summit.
• #2010_04: Material Identification With GMS-Parameters of Coupled Lines.
• #2010_03: Sensitivity of PCB Material Identification with GMS-Parameters to Variations in Test Fixtures.
• #2010_02: Reciprocity and symmetry of interconnects with AC coupling capacitors.
• #2010_01: Y. Shlepnev, A. Neves, T. Dagostino, S. McMorrow, Practical identification of dispersive dielectric models with generalized modal S-parameters for analysis of interconnects in 6-100 Gb/s applications. Slides from the presentation are also available here and all Simbeor solutions generated for the material extraction and validation experiments are available in the data base of Simbeor Examples.
• #2009_06: Benchmarking Simbeor 2008.01 with resonant micro-strip planar structures from PLRD-1 board.
• #2009_05: Designing localizable minimal-reflection via-holes for multi-gigabit interconnects.
• #2009_05i: Designing localizable minimal-reflection via-holes for multi-gigabit interconnects (presentation with additional illustrative material). Version in Japanese is available here.
• #2009_04: Micro-strip line characteristic impedance and TDR.
• #2009_03: Y. Shlepnev, A. Neves, T. Dagostino, S. McMorrow, Measurement-Assisted Electromagnetic Extraction of Interconnect Parameters on Low-Cost FR-4 boards for 6-20 Gb/sec Applications - the award-winning paper from DesignCon2009. Slides from the presentation are also available here and all Simbeor solutions generated for the material extraction and validation experiments are available in the data base of Simbeor Examples.
• #2009_02: Primer of investigation of 90-degree, 45-degree and arched bends in differential line.
• #2009_01: Practical notes on mixed-mode transformations in differential interconnects (with experimental validation).
• #2008_06: Modeling frequency-dependent dielectric loss and dispersion for multi-gigabit data channels (with experimental validation).
• #2008_05: Minimal-reflection bends in micro-strip lines.
• #2008_04: Minimization of reflection from AC coupling capacitors.
• #2008_03: Electromagnetic analysis of spiral inductors with Simbeor 2008.
• #2008_02: Electromagnetic analysis of AC coupling capacitor mounting structures.
• #2008_01: Electromagnetic analysis of decoupling capacitor mounting structures.
• #2007_09: Effect of slots in reference planes on signal propagation in single and differential t-lines.
• #2007_08: Design of optimal differential via-holes for 6-plane board.
• #2007_07: Modeling differential via-holes without stitching vias.
• #2007_06: Effect of microstrip line width on losses per unit length.
• #2007_05: De-compositional analysis of a connector breakout with Simbeor and HyperLynx.
• #2007_04: Examples of broadband extraction of transmission line parameters with Simbeor.
• #2007_03: Comparison of S-parameters of 90-deg. with two 45-deg. bends in microstrip line.
• #2007_02: Modeling frequency-dependent conductor losses and dispersion in serial data channel interconnects.
• #2007_01: Analysis of via-hole cross-talk and reflection loss for a BGA break-out.