Conferences & Shows

• DesignCon 2024, January 30th - February 1st, 2024, Santa Clara:
  

  Demo of Simbeor 2023 at Simberian booth #901

• 2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS2023), October 16, 2023, San Jose:
  

  A. Manukovsky, Y. Shlepnev, S. Mordooch, Quantification of Delay and Skew Uncertainty due to Fiber Weave Effect in PCB Interconnects, 2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS2023), October 16, 2023 - is available in publications section and presentation in presentations section.

• DesignCon 2023, January 31th - February 2nd, 2023, Santa Clara:
  

  A. Manukovsky, Y. Shlepnev, S. Mordooch, Impact Evaluation of Fiber-Weave Effect Induced Delay Uncertainty in DDR Data Links on DDR5 & Towards DDR6, February 2nd, DesignCon 2023 - is available in publications section and presentation in presentations section.

• 2021 IEEE 30st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS2021), October 19, 2021, Virtual:
  

  Y. Shlepnev, Evaluation of S-Parameters Similarity with Modified Hausdorff Distance, 2021 IEEE 30st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS2021), October 19, 2021. - is available in publications section and presentation in presentations section.

• IBIS Virtual Summit with DesignCon 2021, San Jose, California August 19, 2021:
  

  A. Duffy, G. Zhang, Y. Shlepnev, Comparison of Interconnect Model Validation with FSV and SPS Metrics, IBIS Virtual Summit with DesignCon 2021, San Jose, California August 19, 2021. - is available in presentations section.

• IBIS Virtual Summit at 2021 Virtual 2021 IEEE EMC+SIPI Workshop August 12, 2021:
  

  Y. Shlepnev, Analysis to Measurement Validation with S-Parameters Similarity Metric, IBIS Virtual Summit at 2021 Virtual 2021 IEEE EMC+SIPI Workshop August 12, 2021. - is available in presentations section.

• 2021 IEEE 71st Electronic Components and Technology Conference (ECTC 2021), June 2021, Virtual:
  

  A. Manukovsky, Y. Shlepnev, Z. Khasidashvili, Machine Learning Based Design Space Exploration and Applications to Signal Integrity Analysis of 112Gb SerDes Systems, 2021 IEEE 71st Electronic Components and Technology Conference (ECTC 2021), June 2021 - is available in publications section and presentation in presentations section.



• DesignCon 2020, January 28th - January 30th, 2020, Santa Clara Convention Center, Santa Clara, CA

  Stop by booth #501 for demo of new features in Simbeor THz v. 2020 and how to use Simbeor SDK 2020 with API in C/Matlab/Python for signal integrity analysis automation for machine learning and design automation applications.

  Y. Shlepnev, V. Heyfitch, Tutorial – Design Insights from Electromagnetic Analysis & Measurements of PCB & Packaging Interconnects Operating at 6- to 112-Gbps & Beyond, Tuesday, January 28, - presentation is available in presentations section.

  A. Manukovsky, Y. Shlepnev, Z. Khasidashvili, E. Zalianski, Machine Learning Applications for COM Based Simulation of 112Gb Systems, Wednesday, January 29, - is available in publications section and presentation in presentations section.

• 28th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS 2019), Montreal, Canada
  A. Manukovsky, Y. Shlepnev, Measurement-assisted extraction of PCB interconnect model parameters with fabrication variations, 2019 IEEE 28st Conference on Electrical Performance of Electronic Packaging and Systems, Oct. 6-9, 2019, - is available in publications section and presentation in presentations section.


• DesignCon 2019, January 29th - January 31st, 2019, Santa Clara Convention Center, Santa Clara, CA

  Stop by booth #503 for Simbeor THz demo and to discuss how to use Simbeor SDK for design automation or as a solver in your application software.

  H. Wu, M. Shimanouchi, M. Resso, R. Mellitz, Y. Shlepnev, A. Ran Panel – 112-Gbps Package Challenges, January 29th, 2019. - Y. Shlepnev's presentation is available in presentations section.

  A. Manukovsky, Y. Shlepnev, Effect of PCB Fabrication Variations on Interconnect Loss, Delay, Impedance & Identified Material Models for 56-Gbps Interconnect Designs, January 30th, 2019. - is available in publications section and presentation in presentations section.

  Y. Damgaci, Y. Choi, C. Cheng, Y. Shlepnev, Simplify & Validate: A Single Structure Approach for Separate PCB Dielectric & Conductor Roughness Loss Characterization , January 31st, 2019. - is available in publications section and presentation in presentations section.

• 2018 IEEE Symposium on Electromagnetic Compatibility, Signal and Power Integrity, July 30- August 3, 2018, Long Beach Convention Center, Long Beach, CA

  M. Marin, Y. Shlepnev, Systematic approach to PCB interconnects analysis to measurement validation, Best Symposium Paper Finalist, July 31st 2018, 4:00 PM, Promenade 102AB.

  Y. Shlepnev, Visual Electromagnetics of Interconnects - Demo of Simbeor Electromagnetic Signal Integrity Software, August 1st 2018, 2:00-4:00 PM, Rear of Exhibit Hall.

• DesignCon 2018, January 31- February 1, 2018, Santa Clara Convention Center, Santa Clara, CA

  M. Marin, Y. Shlepnev, 40 GHz PCB Interconnects Validation: Expectations vs. Reality, 9:00 - 9:45 AM, January 31st, 2018 - is available in publications section and presentation in presentations section.

  Y. Shlepnev, How Interconnects Work - The Easy Way, Chiphead Theater, 2:15 - 3:15 AM, January 31st, 2018 - is available in presentations section.

• 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS 2017), San Jose, CA
  Y. Shlepnev, Unified approach to interconnect conductor surface roughness modeling, 2017 IEEE 26st Conference on Electrical Performance of Electronic Packaging and Systems, Oct. 17, 2017 - is available in publications section and presentation in presentations section.
• DesignCon 2017, January 31- February 2, 2017, Santa Clara Convention Center, Santa Clara, CA

  Y. Choi, C. Cheng, Y. Damgaci, Y. Shlepnev, Cost-effective PCB Material Characterization for High-volume Production Monitoring, February 1st, 2017 - is available in publications section and presentation in presentations section.

  E. Bogatin, Y. Shlepnev, T. W. Lee, Back to basics: The onset of skin-effect in circuit board traces, February 1st, 2017 - is available in publications section and presentation in presentations section.

• 25th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS 2016), San Jose, CA
  Y. Shlepnev, Y. Choi, C. Cheng, Y. Damgaci, Drawbacks and Possible Improvements of Short Pulse Propagation Technique, 2016 IEEE 25st Conference on Electrical Performance of Electronic Packaging and Systems, Oct. 23-26, 2016, p. 141-143 - is available in publications section and presentation in presentations section.
• DesignCon 2016, January 19-21, 2016, Santa Clara Convention Center, Santa Clara, CA

  C. Nwachukwu, Y. Shlepnev, S. McMorrow, A Material World, Modeling Dielectrics and Conductors for Interconnects Operating at 10-50 GBPS, Tutorial, January 19, 9 am - 12 pm, Ballroom EF.

• 24th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS 2015), San Jose, CA
  Y. Shlepnev, Broadband material model identification with GMS-parameters, 10:50 am, Tuesday, October 27, 2015 - is available in publications section and presentation in presentations section.
• DesignCon 2015, January 27-30, 2015, Santa Clara Convention Center, Santa Clara, CA

  J. Mallon, Y. Shlepnev, S-parameters quality metrics and analysis to measurement correlation, DesignCon 2015, Jan. 29, 2015.

  Closing the loop: What do we do when measurements and simulations don't match? - panel discussion hosted by Martin Rowe with panelists: D. Burnes, S. McMorrow, A. Neves, I. Novak, S. Pytel, Y. Shlepnev, DesignCon 2015, Jan. 29, 2015.

  Y. Shlepnev, Sink or swim at 28 Gbps: How to validate interconnect analysis software for 28 Gbps data links, DesignCon IBIS Forum, Jan. 30, 2015.

• DesignCon 2014, Santa Clara Convention Center, Santa Clara, CA

  W. Beyene, Y.-C. Hahm, J. Ren, D. Secker, D. Mullen, Y. Shlepnev, Lessons learned: How to Make Predictable PCB Interconnects for Data Rates of 50 Gbps and Beyond, DesignCon2014. Paper is nominated for DesignCon2014 Best Paper Award and is available in publications section and presentation in presentations section.

  Y. Shlepnev, Dielectric and conductor roughness model identification for successful PCB and packaging interconnect design up to 50 GHz, DesignCon2014, presentation is available in presentations section.

  Closing the loop: What do we do when measurements and simulations don't match? - panel discussion hosted by Martin Rowe with panelists: D. Burnes, J. Miller, S. McMorrow, A. Neves, S. Pytel, Y. Shlepnev, presentation is available presentations section.

• IEEE International Symposium on Electromagnetic Compatibility (EMC2013), Denver, CO
  Y. Shlepnev, Decompositional Electromagnetic Analysis of Digital Interconnects, 1:30-2:00 pm, Wednesday, August 7, 2013. Paper is available in publications section and presentation in presentations section.
• DesignCon 2013, Santa Clara, CA Simbeor is number one in price-performance metric: Dr. Shlepnev's interview at DesignCon 2013
  Y. Shlepnev, Elements of decompositional electromagnetic analysis of interconnects, Ballroom H, 1:30 pm - 4:30 pm, Monday, January 28, 2013. The presentation is available in presentations section of our web site. Eric Bogatin, Don DeGroot, Paul G. Huray, Yuriy Shlepnev, Which one is better? Comparing Options to Describe Frequency Dependent Losses, Ballroom E, 11:05 am - 11:45 am, Wednesday, January 30, 2013. The paper is nominated for DesignCon 2013 best paper award and is available in publications section and presentation in presentations section.
• EPEPS 2012, Tempe, AZ
  Y. Shlepnev, Coupled 2D Telegrapher's Equations for PDN Analysis, 9 AM, Wednesday, October 24, 2012. Paper is available in publications section and presentation in presentations section.
• DesignCon 2012, Santa Clara, CA
  Y. Shlepnev, C. Nwachukwu, Practical methodology for analyzing the effect of conductor roughness on signal losses and dispersion in interconnects. 9:20 am - 10:00 am, Wednesday, February 1, Ballroom G, the paper is nominated for DesignCon 2012 best paper award and is available in publications section and presentation in presentations section.
• IBIS Summit, Yokohama, Japan, November 18, 2011
  Y. Shlepnev, Quality of S-parameter Models. Japanese version is available here.
• IEEE International Symposium on Electromagnetic Compatibility (EMC2011), Long Beach, CA
  Y. Shlepnev, C. Nwachukwu, Roughness characterization for interconnect analysis. - Proc. of the 2011 IEEE International Symposium on Electromagnetic Compatibility, Long Beach, CA, USA, August, 2011, p. 518-523. Paper is also available in publications section and presentation in technical presentations section.
• IEEE International Symposium on Electromagnetic Compatibility (EMC2011), Long Beach, CA
  Y. Shlepnev, S. McMorrow, Nickel characterization for interconnect analysis. - Proc. of the 2011 IEEE International Symposium on Electromagnetic Compatibility, Long Beach, CA, USA, August, 2011, p. 524-529. Paper is also available in publications section and presentation in technical presentations section.
• DesignCon2011 IBIS Summit, Santa Clara, CA
  Y. Shlepnev, Reflections on S-parameter Quality. 
• Simbeor Takes the Prize - Again: Dr. Shlepnev's interview at DesignCon 2011
• DesignCon 2011, Santa Clara, CA
  E. Bogatin, B. Kirk, M. Jenkins,Y. Shlepnev, M. Steinberger, How to Avoid Butchering S Parameters, Track TP-T3, Dr. Shlepnev's presentation is available in technical presentations section.
• DesignCon 2011, Santa Clara, CA
  J. Bell, S. McMorrow, M. Miller, A. P. Neves, Y. Shlepnev, Unified Methodology of 3D-EM/Channel Simulation/Robust Jitter Decomposition, Track 13 - WA1, paper is available in publications section and presentation in presentations section.
• DesignCon 2011, Santa Clara, CA
  D. Dunham, J. Lee, S. McMorrow, Y. Shlepnev, 2.4mm Design/Optimization with 50 GHz Material Characterization, Track 13 - WA4, paper is available in publications section and presentation in presentations section.
• DesignCon2010 IBIS Summit, Santa Clara, CA
  Y. Shlepnev, Quality Metrics for S-parameter Models. 
• DesignCon2010, Santa Clara, CA
  Y. Shlepnev, A. Neves, T. Dagostino, S. McMorrow, Practical Identification of Dispersive Dielectric Models with Generalized Modal S-parameters for Analysis of Interconnects in 6-100 Gb/s Applications, Track 12-WA2, 9:20am-10:00am, paper is available in publications section and presentation in presentations section. 
• DesignCon2010, Santa Clara, CA
  H. Barnes, Y. Shlepnev, J. Nadolny, T. Dagostino, S. McMorrow, Quality of High Frequency Measurements: Practical Examples, Theoretical Foundations, and Successful Techniques that Work Past the 40GHz Realm, tutorial TF-MP12, February 1, 2010, 9am - 12 pm , all presentations are available in the technical presentation section.
• DesignCon2009 IBIS Summit, Santa Clara, CA
  Y. O. Shlepnev, Primer of mixed-mode transformations in differential interconnects. 
• DesignCon2009, Santa Clara, CA
  Y. Shlepnev, A. Neves, T. Dagostino, S. McMorrow, Measurement-Assisted Electromagnetic Extraction of Interconnect Parameters on Low-Cost FR–4 boards for 6–20 Gbps Applications, Track 12-WA1, 8:30am-9:10am, the paper won DesignCon 2009 best paper award and is available in publications section and presentation is in presentations section.  
• DesignCon2008 IBIS Summit, Santa Clara, CA
  Y. O. Shlepnev, Building advanced transmission line and via-hole models for serial channels with 10 Gbps and higher data rates.